V4-SX25/35 Virtex-4 Development Kit

 

Pardis V4-SX25/35 is a powerful FPGA development kit best used to implement complex digital communication algorithms and signal processing hardware. Containing a large number of embedded high-speed 1818 DSP blocks, high volume of BRAM blocks (up to 3.5 Mbits) and 8 digital clock managers (DCM) the kit can be used as an SOC platform with minimum dimensions. High resolution clock synthesis (better than 1Hz resolution) can also be achieved using the integrated 2/4 channel DDS.
The XC4VSX25 and XC4VSX35 Xilinx FPGAs could be installed on the board depending on the user application for cost optimization. There are also 200 user I/O pins on simple 225 pin header connectors and 140 on two FH connectors. An integrated USB 2.0 interface on the board can be used for both programming the FPGA and high-speed data communication with a computer while there are other solutions for configuration for user comfort.

 

   
FPGA  
  • Xilinx XC4VSX25-10FFG668 or XC4VSX35-10FFG668

FPGA Resources

  • More than 23000/34000 logic cells

  • More than 440/640 I/O pins

  • 192/128 block multipliers

  • 3.5/2.3 Mbits of block RAM capacity

  • 8 digital clock manager (DCM) blocks

  • 4 phase matched clock dividers

Communication

  • USB 2.0 Interface

Board I/O Connectors

  • Eight 225 general purpose I/O expansion connectors (200 I/O Pins)

  • Two 140 pin Free Height (FH) connector (140 I/O pins

Clock Synthesis

  • Integrated 2/4 channel direct digital synthesizer (DDS)

Configuration

  • Boundary Scan

  • USB 2.0 Interface

  • Xilinx Flash XCF16P

Architecture Saving Memory

  • 24C64 I2C EEPROM



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