FPDA Processing Platform
 

Pardis FPGA Processing Platform is an ultra high performance hardware development kit for various communication applications. Using the Virtex-4 Signal Processing Grade (XC4VSX) FPGAs from Xilinx, very complex and high-speed digital architectures can be implemented on the platform. On-Board SRAM and SDRAM memory also enables the designer to have large side memory for the design using Pardis efficient SRAM and SDRAM controller cores.
For connecting to the analog world there are four high-speed ADC and DAC converters on the board which have full phase matching with each other. The analog inputs have variable gain amplifiers in their path to the ADC which can be separately controlled through a simple digital interface from the main FPGA while they can be physically bypassed.
There are two high-speed communication methods for the main board. One is PCI bridge in two options (32-bit, 33MHz and 64-bit 66MHz) and the other is a 10/100 Ethernet interface. The PCI Bridge comes with complete software and driver support and is an effective way to build a computer based processing system in which the Pardis Processing Platform plays the role of a coprocessor board.
The platform uses an extra FPGA (XC2V80) for clock routing, selection, synthesis and distribution to the ADC, DAC and the main FPGA. This FPGA uses its several clock sources (a programmable clock source, one fixed oscillator and one oscillator socket) for this purpose. The whole process in completely under the control of the PCI software and the main FPGA (as an alternative).
 

   
User FPGA  


• Xilinx Virtex-4 FPGA (Signal Processing Grade)
• Standard Option: XC4VSX55-10 or XC4VSX55-11
• Other options: XC4VSX35 or XC4VSX25 available on request

Analog Inputs

• Up to 4 analog input channels
• Analog Devices AD9445 ADCs
• 14 bit resolution (each channel)
• 105 or 125 MSPS sampling rate (each channel)
• Front end filter options
   o Anti-aliasing filter (standard)
   o Bypass jumper available for each channel
• Analog variable gain amplifier
   o -11dB to +34dB digitally controlled gain
   o 10MHz to 700MHz bandwidth
   o Gain control through FPGA/PCI
   o Bypass jumper available for each channel
• Phase matched clocking through board clocking options
• Single-ended analog connection
• MCX type connectors for analog input
• Supplied with coax cables (MCX-BNC)

Analog Outputs

• Up to 4 analog output channels
• Analog Devices AD9776/AD9778/AD9776 DACs
• 12/14/16 bit resolution (each channel)
• 125 MSPS sampling rate (each channel)
• Internal programmable 2X/4X/8X interpolation
• 1GSPS maximum DAC output sampling rate
• Internal I/Q modulation available
• Internal complex modulation available
• DAC programming through FPGA/PCI
• MAX4144 output gain block for each channel
• Output filtering
   o Nyquist filter (standard)
   o Bypass jumper available for each channel
• Phase matched clocking through board clocking options
• Single-ended analog connection
• MCX type connectors for analog input
• Supplied with coax cables (MCX-BNC)

PCI Interface

• 32-bit, 33 MHz or 64-bit, 66MHz PCI Interface in master (initiator) mode
• Up to 800Mbps bandwidth for PCI-32
• Up to 1600Mbps bandwidth for PCI-64
• DMA mode for fast data transfer
• Register mode data transfer for control and monitoring
• Interrupt handling support
• Independent access to main and clock routing FPGA
• Full driver/software support

SRAM Memory

• 4 or 8 or 16 Mbytes ZBT SRAM
• ZBT SRAM controller IP core included
• 2 independent 2 or 4 or 8 MByte banks
• 32 bit data bus per bank
• Max clock frequency: 167MHz
• Max bandwidth per bank: 668 Mbytes/sec

SDRAM Memory

• 64 or 128 Mbytes SDRAM
• SDRAM controller IP core included
• 32 bit data bus
• Maximum clock frequency: 133MHz
• Maximum bandwidth: 532 Mbytes/sec

I/O and User Interface

• Four 2Χ25 Pin Header Connector (100 I/O)
• 16 LEDs (8 on top and 8 on bottom)
• 4 DIP switches
• 4 Push Buttons

Board Clocking Options

• Programmable clock source
   o Installed on-board
   o Programmable through FPGA/PCI
   o 20, 25, 30, 33.33, 40, 45, 50, 60, 66.66, 70, 75, 80, 90, 100, 120MHz frequency options
• Extra clock management FPGA (XC2V80)
   o Clock synthesis with DCMs
   o Differential input/output buffering
   o Phase matched clocking for ADCs and DACs
   o Clock routing and selection for main FPGA
   o Clock selection and synthesis through PCI
• One Fixed Oscillator for XC4VSX FPGA and one for XC2V80
• One socket for external oscillator
• One MCX for external clock source

FPGA Programming

• Two independent JTAG chains for main and clock routing FPGA
• Platform flash for fast stand-alone programming
• Software programming of XC4VSX through PCI

Cooling

• FPGA cooling FAN and heat sink
• Board Temperatures Measurement

Power

• Two 10A power supply modules for FPGA core and I/O
• PCI +5V power usage
• Input power connector for +5VDC for stand-alone applications


 

 

 

PCI Interface

32bit,33MHz

None

PCI Interface Bandwidth

800Mbps

350 Mbps

FPGA

XC4VSX35

 
FPGA Speed

-10

2

# of ADC

3

80MSPS

ADC Speed

105MSPS

None

# of DAC

1

12

# of DAC bits

14

None

SDRAM Memory

64MB SDRAM

 
SRAM Memory

None

 

Ethernet

None

 

SDRAM Logging Core

No

 

 




Self-Test Software


The platform comes with strong PCI-based self-test software which enables the designer to have a fast performance/debug test of the main board. Some of the test scenarios are:
• Correct driver installation for initial connection
• Identification of the board block diagram and options
• Correct data transmit/receive through PCI
• PCI Interface transmit/receive bandwidth measurement
• Analog front end performance test by ADC-DAC loop back
• SRAM/SDRAM verification
• Date communication through Ethernet interface
 
PCI Software Support

The platform comes with a complete set of basic software functions for data communication and board control. Some of them are:
• Open, close and reset the board
• Read and write functions for Register mode
• Read and write functions for DMA mode
• Interrupt support from local bus (FPGA)
• FPGA high speed Configuration function
• Programmable clock source configuration
• Clock distribution, selection and synthesis function (from XC2V80 to XC4VSX55)
• Board’s status register read function
• Board temperature read function

Deliverables

• Pardis FPGA Processing Platform
• Software and documentation CD
• 6-month product maintenance (software and document updates)
• 12-month technical support


 

 

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